1. Field of the Invention
The present invention relates to a semiconductor device manufacturing technology or more particularly a heat processing technology for processing a substrate to be processed while being heated up by heating elements in a processing chamber and also relates to a heating apparatus, a substrate processing apparatus, and a method of manufacturing semiconductor devices.
2. Description of the Related Art
FIG. 1 is a schematic cross sectional view of a processing furnace 500 equipped with a conventional heating apparatus. The conventional heating apparatus comprises a metallic casing 501 arranged of substantially a tubular shape with the upper end closed, a thermal insulator material 502 arranged of substantially a tubular shape and disposed at the inside of the casing 501, and heating wires 503 mounted to the inner wall of the thermal insulator material 502. The heating apparatus contains a thermal equalizer tube 504 and a reactor tube 505 which acts as a processing chamber and the action of heating up a wafer 506 in a given manner is carried out in the reactor tube 505.
It has been demanded in the metallic wiring process (Cu annealing etc.) to decrease the processing temperature (to not higher than 300° C.) and improve the throughput. Therefore, the shortening of the temperature increase and decrease of the wafer is essential. However, for responding to the above demand, such a conventional heating apparatus as shown in FIG. 1 employs a large amount of thermally insulating materials for permitting the use of heaters in middle and high temperature ranges, hence being low in the temperature increase and decrease response and hardly improving the throughput. It is thus desired to provide an improved heating apparatus which is high in the thermal response.
Disclosed in Patent Citation 1 is a substrate processing apparatus which allows its heating space to be cooled down rapidly with the cooling gas supplied through the pins which are provided to extend through the heating elements. The thermal response in the heating apparatus can thus be improved by modifying the cooling property.
As the wafer processing action has significantly been minimized in the structural arrangement, wafers have to be further decreased in the variations throughout their surface (including differences in the surface temperature and the layer thickness). Patent Citation 2 discloses to decrease the surface variations with the use of reflector mirrors mounted to the upper end of the processing chamber for reflecting and concentrating the heat emitted from the heaters at the center of the wafers.
However, the reflector mirrors are fixed in their position while the temperature adjustment at the center of the wafers is conducted not separately of the edge, thus failing to eliminating the surface variations.
A thermal processing apparatus disclosed in Patent Citation 3 has reflectors mounted movably for reflecting towards the substrate the heat emitted from the heaters which are mounted above and along the outer edge of the substrate. However, the reflectors can simply be moved upward and downward from the substrate for adjusting the temperature of the processing action, hence failing to eliminate the surface variations.
Another thermal processing apparatus disclosed in Patent Citation 4 has an ultra violet lamp disposed at a position opposite to the substrate and reflectors mounted between the ultraviolet lamp and the substrate for moving or tilting at angles so that the ultra violet light falls uniformly on the substrate. However, this discloses or teaches non of the surface variations.
A further thermal processing apparatus disclosed in Patent Citation 5 has temperature sensors disposed for measuring the temperature at both the edge and the center of the substrate at the uppermost level, whereby the action of heating means can be controlled separately by the temperature information from the temperature sensors. However, while the action of controlling the heating means is troublesome, the surface variations may sufficiently be eliminated without success.    Patent Citation 1: WO2007/023855.    Patent Citation 2: Japanese Patent Laid-open Publication No. 2005-32883.    Patent Citation 3: Japanese Patent Laid-open Publication No. (Heisei) 7-321059.    Patent Citation 4: Japanese Patent Laid-open Publication No. 2006-114848.    Patent Citation 5: Japanese Patent Laid-open Publication No. 2004-119510.